/*********************************************************************************/
/*                                                                               */
/*      ADC Driver                                                               */
/*                                                                               */
/*      Last updated by:  CBS                                                    */
/*      Last update date: 12/12/25                                               */
/*      Revision:         0                                                      */
/*      Copyright:        DENSO                                                  */
/*                                                                               */
/*********************************************************************************/

#ifndef ADC_CFG_H
#define ADC_CFG_H

/*********************************************************************************/
/*  defines / data types / structs / unions / macros                             */
/*********************************************************************************/
#define ADC_DEINIT_API                     STD_ON
#define ADC_DEV_ERROR_DETECT               STD_ON
#define ADC_ENABLE_START_STOP_GROUP_API    STD_ON
#define ADC_GRP_NOTIF_CAPABILITY           STD_ON
#define ADC_HW_TRIGGER_API                 STD_ON
#define ADC_READ_GROUP_API                 STD_ON
#define ADC_VERSION_INFO_API               STD_ON

typedef U2 Adc_ValueGroupType;

typedef union
{
    volatile U4 R;
    struct
    {
        volatile U4 EOQ:1;               /* End Of Queue Bit */
        volatile U4 PAUSE:1;             /* Pause Bit */
        volatile U4 REP:1;               /* Repeat/Loop Start Point Indicatio n*/
        volatile U4 :2;
        volatile U4 EB:1;                /* External Buffer Bit */
        volatile U4 BN:1;                /* Buffer Number Bit */
        volatile U4 CAL:1;               /* Calibration Bit */
        volatile U4 MESSAGE_TAG:4;       /* MESSAGE_TAG Field */
        volatile U4 LST:2;               /* Long Sampling Time */
        volatile U4 TSR:1;               /* Time Stamp Request */
        volatile U4 FMT:1;               /* Conversion Data Format */
        volatile U4 CHANNEL_NUMBER:8;    /* Channel Number Field */
        volatile U4 :8;
    }B;
}Adc_CommandType;

typedef enum
{
    ADC_SYSTEM_CLOCK
}Adc_ClockSourceType;

typedef enum
{
    ADC_SYSTEM_CLOCK_DISABLED,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_1,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_2,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_4,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_6,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_8,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_10,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_12,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_14,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_16,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_18,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_20,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_22,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_24,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_26,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_28,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_30,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_32,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_34,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_36,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_38,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_40,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_42,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_44,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_46,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_48,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_50,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_52,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_54,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_56,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_58,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_60,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_62,
    ADC_SYSTEM_CLOCK_DIVIDE_FACTOR_64
}Adc_PrescaleType;

typedef struct
{
    Adc_ClockSourceType clockSource;
    U1                  hwUnitId;
    Adc_PrescaleType    adcPrescale;
}Adc_HWConfigurationType;

typedef enum
{
    ADC_CONVERSION_TIME_2_CLOCKS,
    ADC_CONVERSION_TIME_8_CLOCKS,
    ADC_CONVERSION_TIME_64_CLOCKS,
    ADC_CONVERSION_TIME_128_CLOCKS
}Adc_ConversionTimeType;


typedef enum
{
    ADC_REFERENCE_VOLTAGE_GROUND,
    ADC_REFERENCE_VOLTAGE_5V
}Adc_VoltageSourceType;

typedef enum
{
    ADC_RESOLUTION_12BITS
}Adc_ResolutionType;


typedef enum
{
    ADC_CALIBRATION_DISABLED,
    ADC_CALIBRATION_ENABLED
}Adc_CalibrationType;


typedef struct
{
    Adc_ConversionTimeType adcChannelConvTime;
    Adc_VoltageSourceType  adcChannelRefVoltSrcLow;
    Adc_VoltageSourceType  adcChannelRefVoltSrcHigh;
    Adc_ResolutionType     adcChannelResolution;
    Adc_CalibrationType    adcChannelCalibrationEnable;
}Adc_ChannelConfigurationType;

typedef enum
{
    ADC_CONV_MODE_DISABLED,
    ADC_CONV_MODE_ONESHOT,
    ADC_CONV_MODE_CONTINOUS = 9
}Adc_GroupConvModeType;

typedef enum
{
    ADC_NO_TIMER
}Adc_HwTriggerTimerType;

typedef enum
{
    ADC_IDLE,
    ADC_BUSY,
    ADC_COMPLETED,
    ADC_STREAM_COMPLETED
}Adc_StatusType;

typedef enum
{
    ADC_ACCESS_MODE_SINGLE,
    ADC_ACCESS_MODE_STREAMING
}Adc_GroupAccessModeType;

typedef enum
{
    ADC_TRIGG_SRC_HW,
    ADC_TRIGG_SRC_SW
}Adc_TriggerSourceType;

typedef enum
{
    ADC_NO_HW_TRIG,
    ADC_HW_TRIG_LOW_GATED = 2,
    ADC_HW_TRIG_HIGH_GATED,
    ADC_HW_TRIG_FALLING_EDGE,
    ADC_HW_TRIG_RISING_EDGE,
    ADC_HW_TRIG_BOTH_EDGES
}Adc_HwTriggerSignalType;

typedef enum
{
    ADC_NO_STREAMING,
    ADC_STREAM_BUFFER_CIRCULAR,
    ADC_STREAM_BUFFER_LINEAR
}Adc_StreamBufferModeType;

typedef U2 Adc_StreamNumSampleType;

typedef enum
{
    ADC_CH0 = (U1)0,
    ADC_CH1 = (U1)1,
    ADC_CH2 = (U1)2,
    ADC_CH3 = (U1)3,
    ADC_CH4 = (U1)4,
    ADC_CH5 = (U1)5,
    ADC_CH6 = (U1)6,
    ADC_CH7 = (U1)7,
    ADC_CH8 = (U1)8,
    ADC_CH9 = (U1)9,
    ADC_CH10 = (U1)10,
    ADC_CH11 = (U1)11,
    ADC_CH12 = (U1)12,
    ADC_CH13 = (U1)13,
    ADC_CH14 = (U1)14,
    ADC_CH15 = (U1)15,
    ADC_CH16 = (U1)16,
    ADC_CH17 = (U1)17,
    ADC_CH18 = (U1)18,
    ADC_CH19 = (U1)19,
    ADC_CH20 = (U1)20,
    ADC_CH21 = (U1)21,
    ADC_CH22 = (U1)22,
    ADC_CH23 = (U1)23,
    ADC_CH24 = (U1)24,
    ADC_CH25 = (U1)25,
    ADC_CH26 = (U1)26,
    ADC_CH27 = (U1)27,
    ADC_CH28 = (U1)28,
    ADC_CH29 = (U1)29,
    ADC_CH30 = (U1)30,
    ADC_CH31 = (U1)31,
    ADC_CH32 = (U1)32,
    ADC_CH33 = (U1)33,
    ADC_CH34 = (U1)34,
    ADC_CH35 = (U1)35,
    ADC_CH36 = (U1)36,
    ADC_CH37 = (U1)37,
    ADC_CH38 = (U1)38,
    ADC_CH39 = (U1)39,
    ADC_CH40 = (U1)40,
    ADC_CH41 = (U1)41,
    ADC_CH42 = (U1)42,
    ADC_CH43 = (U1)43,
    ADC_CH44 = (U1)44,
    ADC_CH45 = (U1)45,
    ADC_CH46 = (U1)46,
    ADC_CH47 = (U1)47,
    ADC_CH48 = (U1)48,
    ADC_CH49 = (U1)49,
    ADC_NBR_OF_CHANNELS = (U1)50
}Adc_ChannelType;

typedef struct
{
    U1 notifictionEnable;
    Adc_ValueGroupType *resultBufferPtr;
    Adc_StatusType groupStatus;
}Adc_GroupStatus;

#endif  /* ADC_CFG_H */
/**** End Of File ****************************************************************/
